Publicaciones en la fuente Design Automation and Test in Europe Conference and Exhibition

Tipo Año Título Fuente
Ponencia2019Generation of Lifetime-Aware Pareto-Optimal Fronts Using a Stochastic Reliability SimulatorDesign Automation and Test in Europe Conference and Exhibition
Ponencia2019New method for the automated massive characterization of Bias Temperature Instability in CMOS transistorsDesign Automation and Test in Europe Conference and Exhibition
Ponencia2017On the limits of machine learning-based test: a calibrated mixed-signal system case studyDesign Automation and Test in Europe Conference and Exhibition
Ponencia2016Accurate Synthesis of Integrated RF Passive Components Using Surrogate ModelsDesign Automation and Test in Europe Conference and Exhibition
Ponencia2014Implementation Issues in the Hierarchical Composition of Performance Models of Analog CircuitsDesign Automation and Test in Europe Conference and Exhibition
Ponencia2014Model Based Hierarchical Optimization Strategies for Analog Design AutomationDesign Automation and Test in Europe Conference and Exhibition
Ponencia2014Sigma-delta testability for pipeline A/D convertersDesign Automation and Test in Europe Conference and Exhibition
Ponencia2013Area Optimization on Fixed Analog Floorplans using Convex Area FunctionsDesign Automation and Test in Europe Conference and Exhibition
Ponencia2010An Accurate and Efficient Yield Optimization Method for Analog Circuits Based on Computing Budget Allocation and Memetic Search TechniqueDesign Automation and Test in Europe Conference and Exhibition
Ponencia2009Analog Layout Synthesis - Recent Advances in Topological ApproachesDesign Automation and Test in Europe Conference and Exhibition
Ponencia2008A triple-mode reconfigurable sigma-delta modulator for multi-standard wireless applicationsDesign Automation and Test in Europe Conference and Exhibition
Ponencia2008On the design of tunable fault tolerant circuits on SRAM-based FPGAs for safety critical applicationsDesign Automation and Test in Europe Conference and Exhibition
Ponencia2008Practical implementation of a network analyzer for analog BIST applicationsDesign Automation and Test in Europe Conference and Exhibition
Ponencia2006Double-sampling single-loop sigma-delta modulator topologies for broadband applicationsDesign Automation and Test in Europe Conference and Exhibition
Ponencia2006Systematic and optimal design of CMOS two-stage opamps with hybrid cascode compensationDesign Automation and Test in Europe Conference and Exhibition
Ponencia2004MATLAB/SIMULINK-based high-level synthesis of discrete-time and continuous-time Σ Δ modulatorsDesign Automation and Test in Europe Conference and Exhibition
Ponencia2003Behavioural modelling and simulation of Sigma Delta modulators using hardware description languagesDesign Automation and Test in Europe Conference and Exhibition
Ponencia2000A hierarchical approach for the symbolic analysis of large analog integrated circuitsDesign Automation and Test in Europe Conference and Exhibition
Ponencia2000A VHDL-based methodology for the design and verification of pipeline A/D convertersDesign Automation and Test in Europe Conference and Exhibition
Ponencia2000XFridge: A SPICE-based, portable, user-friendly cell-level sizing toolDesign Automation and Test in Europe Conference and Exhibition