Ver Investigador - - Prisma - Unidad de Bibliometría

Eros Camacho Ruiz

Predoctoral PIF FPU Ministerio
ecruiz@us.es
Tipo Año Título Fuente
Ponencia2024 Cryptographic Security Through a Hardware Root of Trust Lecture Notes in Computer Science
Ponencia2023 A Peak Detect & Hold circuit to measure and exploit RTN in a 65-nm CMOS PUF Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023
Ponencia2023 A Simple Power Analysis of an FPGA implementation of a polynomial multiplier for the NTRU cryptosystem 2023 38th Conference on Design of Circuits and Integrated Systems, DCIS 2023
Ponencia2023 Design considerations for a CMOS 65-nm RTN-based PUF Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023
Artículo2023 Timing-attack-resistant acceleration of NTRU round 3 encryption on resource-constrained embedded systems Cryptography
Ponencia2022 A novel physical unclonable function using RTN Proceedings - IEEE International Symposium on Circuits and Systems
Capítulo2022 Diseño y evaluación de las prestaciones defunciones físicas no clonables basadas enosciladores en anillo sobre FPGAs Investigación en Ciberseguridad Actas de las VII Jornadas Nacionales (7º.2022.Bilbao)
Artículo2022 Efficient RO-PUF for generation of identifiers and keys in resource-constrained embedded systems Cryptography
Capítulo2022 Hardware dedicado para la optimización temporaldel algoritmo NTRU Investigación en Ciberseguridad Actas de las VII Jornadas Nacionales (7º.2022.Bilbao)
Ponencia2022 High-level design of a novel PUF based on RTN Proceedings - 2022 18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022
Artículo2022 Multi-Unit Serial Polynomial Multiplier to Accelerate NTRU-Based Cryptographic Schemes in IoT Embedded Systems. SENSORS
Ponencia2022 On the use of an RTN simulator to explore the quality trade-offs of a novel RTN-based PUF Proceedings - 2022 18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022
Artículo2021 A Configurable RO-PUF for Securing Embedded Systems Implemented on Programmable Devices ELECTRONICS
Ponencia2021 A study of SRAM PUFs reliability using the static noise margin SMACD / PRIME 2021 - International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design and 16th Conference on PhD Research in Microelectronics and Electronics
Ponencia2021 Design Flow to Evaluate the Performance of Ring Oscillator PUFs on FPGAs 36th Conference on Design of Circuits and Integrated Systems, DCIS 2021
Ponencia2021 Simulating the impact of random telegraph noise on integrated circuits SMACD / PRIME 2021 - International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design and 16th Conference on PhD Research in Microelectronics and Electronics
Artículo2021 Timing-Optimized Hardware Implementation to Accelerate Polynomial Multiplication in the NTRU Algorithm ACM Journal on Emerging Technologies in Computing Systems
Ponencia2020 Accelerating the Development of NTRU Algorithm on Embedded Systems 2020 35th Conference on Design of Circuits and Integrated Systems, DCIS 2020

Proyectos de Investigación

Fecha de inicio Fecha de fin Rol Denominación Agencia financiadora
01/06/2020 29/02/2024 Investigador/a The Variability Challenge in Nano-CMOS: from Device Modeling to IC Design for Mitigation and Exploitation (Vigilant-Imse) (PID2019-103869RB-C31) Ministerio de Ciencia, Innovación y Universidades (Nacional)
01/06/2020 29/02/2024 Contratado The Variability Challenge in Nano-CMOS: from Device Modeling to IC Design for Mitigation and Exploitation (Vigilant-Imse) (PID2019-103869RB-C31) Ministerio de Ciencia, Innovación y Universidades (Nacional)
01/01/2018 30/09/2021 Investigador/a Diseño de Soluciones Hardware para Gestionar con Confianza, Seguridad y Privacidad la Identidad de las Personas y cosas en el Marco de la Iot (TEC2017-83557-R) Ministerio de Economía y Competitividad (Nacional)
30/12/2016 29/06/2021 Contratado Dispositivos, Circuitos y Arquitecturas Fiables y de Bajo Consumo para Iot (TEC2016-75151-C3-3-R) Ministerio de Economía y Competitividad (Nacional)
El investigador no tiene ningún resultado de investigación asociado