María Teresa Serrano Gotarredona

Profesora Asociada
tserrano@us.es
Área de conocimiento: Arquitectura y Tecnología de Computadores
Departamento: Arquitectura y Tecnolog. de Computadores
Grupo: DISEÑO Y TEST DE CIRCUITOS INTEGRADOS DE SEÑAL MIXTA (TIC-178)
Prog. doctorado: Programa de Doctorado en Ciencias y Tecnologías Físicas (RD. 99/2011)
Tipo Año Título Fuente
Artículo2021 Hardware implementation of differential oscillatory neural networks using VO2-based oscillators and memristor-bridge circuits FRONTIERS IN NEUROSCIENCE
Ponencia2021 Implementation of binary stochastic STDP learning using chalcogenide-based memristive devices Proceedings - IEEE International Symposium on Circuits and Systems
Artículo2021 Neuromorphic low-power inference on memristive crossbars with on-chip offset calibration IEEE ACCESS
Ponencia2020 A Current-Attenuator for Performing Read Operation in Memristor-Based Spiking Neural Networks 2020 35th Conference on Design of Circuits and Integrated Systems, DCIS 2020
Ponencia2020 Auxiliary pulse-extender and current-attenuator circuits for flexible interaction with memristive crossbars in SNNs ICECS 2020 - 27th IEEE International Conference on Electronics, Circuits and Systems, Proceedings
Ponencia2020 Confession session: Lessons learned the hard way Proceedings - IEEE International Symposium on Circuits and Systems
Artículo2020 Enhanced Linearity in FD-SOI CMOS Body-Input Analog Circuits - Application to Voltage-Controlled Ring Oscillators and Frequency-Based sigma Delta ADCs IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Artículo2020 Event-driven implementation of deep spiking convolutional neural networks for supervised classification using the SpiNNaker neuromorphic platform NEURAL NETWORKS
Ponencia2020 Experimental body-input three-stage DC offset calibration scheme for memristive crossbar Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia2020 Implementation of a tunable spiking neuron for STDP with memristors in FDSOI 28nm Proceedings - 2020 IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2020
Editorial2020 Introduction to the Special Issue on the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS 2020) IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS
Ponencia2020 Oscillatory Hebbian Rule (OHR): an adaption of the Hebbian rule to Oscillatory Neural Networks 2020 35th Conference on Design of Circuits and Integrated Systems, DCIS 2020
Ponencia2020 Using neural networks for optimum band selection in cognitive-radio systems ICECS 2020 - 27th IEEE International Conference on Electronics, Circuits and Systems, Proceedings
Ponencia2019 A current attenuator for efficient memristive crossbars read-out 2019 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
Artículo2019 A Digital Neuromorphic Realization of the 2-D Wilson Neuron Model IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
Artículo2019 Asynchronous Spiking Neurons, the natural key to exploit temporal sparsity IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS
Ponencia2019 Conversion of Synchronous Artificial Neural Network to Asynchronous Spiking Neural Network using sigma-delta quantization Proceedings 2019 IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2019
Ponencia2019 Digital-signal-processor realization of izhikevich neural network for real-time interaction with electrophysiology experiments 2019 26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019
Ponencia2019 Learning weights with STDP to build prototype images for classification Proceedings - 2019 14th IEEE International Conference on Design and Technology of Integrated Systems In Nanoscale Era, DTIS 2019
Ponencia2019 Low-power hardware implementation of SNN with decision block for recognition tasks 2019 26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019
Revisión2019 Neuromorphic spiking neural networks and their memristor-CMOS hardware implementations MATERIALS
Ponencia2019 Scene Context Classification with Event-Driven Spiking Deep Neural Networks 2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018
Capítulo2019 Spike-timing-dependent-plasticity with memristors Handbook of Memristor Networks
Artículo2018 A Configurable Event-Driven Convolutional Node with Rate Saturation Mechanism for Modular ConvNet Systems Implementation FRONTIERS IN NEUROSCIENCE
Artículo2018 Active Perception with Dynamic Vision Sensors. Minimum Saccades with Optimum Recognition IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS
Ponencia2018 An Intrinsic Method for Fast Parameter Update on the SpiNNaker Platform Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia2018 Bulk-based DC offset calibration for low-power memristor array read-out system 2017 32nd Conference on Design of Circuits and Integrated Systems, DCIS 2017 - Proceedings
Artículo2018 Calibration of offset via bulk for low-power HfO2 based 1T1R memristive crossbar read-out system MICROELECTRONIC ENGINEERING
Ponencia2018 Event-Driven Configurable Module with Refractory Mechanism for ConvNets on FPGA Proceedings - IEEE International Symposium on Circuits and Systems
Artículo2018 Event-Driven Stereo Visual Tracking Algorithm to Solve Object Occlusion IEEE TRANSACTIONS ON NEURAL NETWORKS AND LEARNING SYSTEMS
Ponencia2018 Hybrid Neural Network, An Efficient Low-Power Digital Hardware Implementation of Event-based Artificial Neural Network Proceedings - IEEE International Symposium on Circuits and Systems
Artículo2018 On practical issues for stochastic STDP hardware with 1-bit synaptic weights FRONTIERS IN NEUROSCIENCE
Artículo2018 Performance Comparison of Time-Step-Driven versus Event-Driven Neural State Update Approaches in SpiNNaker 2018 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
Ponencia2018 Scene Context Classification with Event-Driven Spiking Deep Neural Networks 2018 25TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS)
Ponencia2018 Spiking hough for shape recognition Lecture Notes in Computer Science
Artículo2017 A Spiking Neural Network Model of the Lateral Geniculate Nucleus on the SpiNNaker Machine FRONTIERS IN NEUROSCIENCE
Artículo2017 An Event-Driven Classifier for Spiking Neural Networks Fed with Synthetic or Dynamic Vision Sensor Data FRONTIERS IN NEUROSCIENCE
Ponencia2017 Hardware implementation of convolutional STDP for on-line visual feature learning Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia2017 Live demonstration: Hardware implementation of convolutional STDP for on-line visual feature learning Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia2017 Live demonstration: Multiplexing AER asynchronous channels over LVDS links with flow-control and clock-correction for scalable neuromorphic systems Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia2017 Multiplexing AER asynchronous channels over LVDS links with flow-control and clock-correction for scalable neuromorphic systems 2017 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
Artículo2017 On Multiple AER Handshaking Channels Over High-Speed Bit-Serial Bidirectional LVDS Links With Flow-Control and Clock-Correction on Commercial FPGAs for Scalable Neuromorphic Systems IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS
Ponencia2017 Passive localization and detection of quadcopter UAVs by using Dynamic Vision Sensor 2017 5TH IRANIAN JOINT CONGRESS ON FUZZY AND INTELLIGENT SYSTEMS (CFIS)
Artículo2016 Benchmarking Spike-Based Visual Recognition: A Dataset and Evaluation FRONTIERS IN NEUROSCIENCE
Artículo2016 Fast Predictive Handshaking in Synchronous FPGAs for Fully Asynchronous Multisymbol Chip Links: Application to SpiNNaker 2-of-7 Links IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
Ponencia2015 ConvNets Experiments on SpiNNaker 2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
Ponencia2015 Fast Pipeline 128×128 pixel spiking convolution core for event-driven vision processing in FPGAs Proceedings of 1st International Conference on Event-Based Control, Communication and Signal Processing, EBCCSP 2015
Ponencia2015 Fast Pipeline 128x128 Pixel Spiking Convolution Core for Event-Driven Vision Processing in FPGAs PROCEEDINGS OF FIRST INTERNATIONAL CONFERENCE ON EVENT-BASED CONTROL, COMMUNICATION AND SIGNAL PROCESSING EBCCSP 2015
Ponencia2015 High-speed serial interfaces for event-driven neuromorphic systems Proceedings of 1st International Conference on Event-Based Control, Communication and Signal Processing, EBCCSP 2015
Ponencia2015 Introduction to the IEEE-CASS Workshop on Micro/Nanoelectronic Circuits and Systems IEEE EUROCON 2015 - INTERNATIONAL CONFERENCE ON COMPUTER AS A TOOL (EUROCON)
Revisión2015 Plasticity in memristive devices for spiking neural networks FRONTIERS IN NEUROSCIENCE
Artículo2015 Poker-DVS and MNIST-DVS. Their history, how they were made, and other details FRONTIERS IN NEUROSCIENCE
Ponencia2014 An AER handshake-less modular infrastructure PCB with x8 2.5Gbps LVDS serial links 2014 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
Ponencia2014 Event-Driven Sensing and Processing for High-Speed Robotic Vision 2014 IEEE BIOMEDICAL CIRCUITS AND SYSTEMS CONFERENCE (BIOCAS)
Ponencia2014 Event-driven stereo vision with orientation filters 2014 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
Ponencia2014 Live Demonstration: Event-Driven Sensing and Processing for High-Speed Robotic Vision 2014 IEEE BIOMEDICAL CIRCUITS AND SYSTEMS CONFERENCE (BIOCAS)
Artículo2014 On the use of orientation filters for 3D reconstruction in event-driven stereo vision FRONTIERS IN NEUROSCIENCE
Artículo2014 Retinomorphic Event-Based Vision Sensors: Bioinspired Cameras With Spiking Output PROCEEDINGS OF THE IEEE
Ponencia2014 Spike-based VITE control with dynamic vision sensor applied to an arm robot Proceedings - IEEE International Symposium on Circuits and Systems
Capítulo2014 Spike-timing-dependent-plasticity in hybrid memristive-CMOS spiking neuromorphic systems Memristors and Memristive Systems
Artículo2013 A 1.5 ns OFF/ON Switching-Time Voltage-Mode LVDS Driver/Receiver Pair for Asynchronous AER Bit-Serial Chip Grid Links With Up to 40 Times Event-Rate Dependent Power Savings IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS
Artículo2013 A 128 x 128 1.5% Contrast Sensitivity 0.9% FPN 3 mu s Latency 4 mW Asynchronous Frame-Free Dynamic Vision Sensor Using Transimpedance Preamplifiers IEEE JOURNAL OF SOLID-STATE CIRCUITS
Artículo2013 A Proposal for Hybrid Memristor-CMOS Spiking Neuromorphic Learning Systems IEEE CIRCUITS AND SYSTEMS MAGAZINE
Ponencia2013 Improved Contrast Sensitivity DVS and its Application to Event-Driven Stereo Vision 2013 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
Artículo2013 Mapping from Frame-Driven to Frame-Free Event-Driven Vision Systems by Low-Rate Rate Coding and Coincidence Processing-Application to Feedforward ConvNets IEEE TRANSACTIONS ON PATTERN ANALYSIS AND MACHINE INTELLIGENCE
Artículo2013 Multicasting Mesh AER: A Scalable Assembly Approach for Reconfigurable Neuromorphic Structured AER Systems. Application to ConvNets IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS
Artículo2013 STDP and sTDP variations with memristors for spiking neuromorphic learning systems FRONTIERS IN NEUROSCIENCE
Artículo2012 A ${0.35}~mu{ m m}$ Sub-ns Wake-up Time ON-OFF Switchable LVDS Driver-Receiver Chip I/O Pad Pair for Rate-Dependent Power Saving in AER Bit-Serial Links IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS
Artículo2012 A memristive nanoparticle/organic hybrid synapstor for neuroinspired computing ADVANCED FUNCTIONAL MATERIALS
Ponencia2012 A real-time, event-driven neuromorphic system for goal-directed attentional selection NEURAL INFORMATION PROCESSING, ICONIP 2012, PT II
Artículo2012 An Event-Driven Multi-Kernel Convolution Processor Module for Event-Driven Vision Sensors IEEE JOURNAL OF SOLID-STATE CIRCUITS
Artículo2012 Comparison between frame-constrained fix-pixel-value and frame-free spiking-dynamic-pixel convNets for visual processing FRONTIERS IN NEUROSCIENCE
Ponencia2012 Design of adaptive nano/CMOS neural architectures 2012 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
Artículo2011 A 3.6 mu s Latency Asynchronous Frame-Free Event-Driven Dynamic-Vision-Sensor IEEE JOURNAL OF SOLID-STATE CIRCUITS
Artículo2011 A 32 x 32 Pixel Convolution Processor Chip for Address Event Vision Sensors With 155 ns Event Latency and 20 Meps Throughput IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Artículo2011 An Instant-Startup Jitter-Tolerant Manchester-Encoding Serializer/Deserializer Scheme for Event-Driven Bit-Serial LVDS Interchip AER Links IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Revisión2011 Neuromorphic silicon neuron circuits FRONTIERS IN NEUROSCIENCE
Artículo2011 On spike-timing-dependent-plasticity, memristive devices, and building a self-learning visual cortex FRONTIERS IN NEUROSCIENCE
Ponencia2011 Voltage Mode Driver for Low Power Transmission of High Speed Serial AER Links 2011 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
Ponencia2010 A 100dB dynamic range event-driven spatial contrast sensor with 100μs response time and time-to-first-spike mode ESSCIRC 2010 - 36th European Solid State Circuits Conference
Artículo2010 A Five-Decade Dynamic-Range Ambient-Light-Independent Calibrated Signed-Spatial-Contrast AER Retina With 0.1-ms Latency and Optional Time-to-First-Spike Mode IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Ponencia2010 A Signed Spatial Contrast Event Spike Retina Chip 2010 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS
Artículo2010 Fast Vision Through Frameless Event-Based Sensing and Convolutional Processing: Application to Texture Recognition IEEE TRANSACTIONS ON NEURAL NETWORKS
Ponencia2010 Neocortical Frame-free Vision Sensing and Processing through Scalable Spiking ConvNet Hardware 2010 INTERNATIONAL JOINT CONFERENCE ON NEURAL NETWORKS IJCNN 2010
Ponencia2010 On Neuromorphic Spiking Architectures for Asynchronous STDP Memristive Systems 2010 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS
Ponencia2010 On Scalable Spiking ConvNet Hardware for Cortex-Like Visual Sensory Processing Systems 2010 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS
Ponencia2010 Spike-based convolutional network for real-time processing 2010 20th International Conference on Pattern Recognition
Ponencia2009 A Mismatch Calibrated Bipolar Spatial Contrast AER Retina with Adjustable Contrast Threshold ISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-5
Artículo2009 A weak-to-strong inversion mismatch model for analog circuit design ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
Ponencia2009 Advanced Vision Processing Systems: Spike-Based Simulation and Processing ADVANCED CONCEPTS FOR INTELLIGENT VISION SYSTEMS, PROCEEDINGS
Artículo2009 CAVIAR: A 45k Neuron, 5M Synapse, 12G Connects/s AER Hardware Sensory-Processing-Learning-Actuating System for High-Speed Visual Object Recognition and Tracking IEEE TRANSACTIONS ON NEURAL NETWORKS
Ponencia2009 Exploiting Memristance in Adaptive Asynchronous Spiking Neuromorphic Nanotechnology Systems 2009 9TH IEEE CONFERENCE ON NANOTECHNOLOGY (IEEE-NANO)
Ponencia2009 Fast and Compact Simulation Models for a Variety of FET Nano Devices by the CMOS EKV Equations 2009 9TH IEEE CONFERENCE ON NANOTECHNOLOGY (IEEE-NANO)
Ponencia2009 OTA-C oscillator with low frequency variations for on-chip clock generation in serial LVDS-AER links ISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-5
Artículo2008 A calibration technique for very low current and compact tunable neuromorphic cells: Application to 5-bit 20-nA DACs IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
Ponencia2008 Compact calibration circuit for large neuromorphic arrays PROCEEDINGS OF 2008 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-10
Ponencia2008 EVENT BASED VISION SENSING AND PROCESSING 2008 15TH IEEE INTERNATIONAL CONFERENCE ON IMAGE PROCESSING, VOLS 1-5
Ponencia2008 Fully digital AER convolution chip for vision processing PROCEEDINGS OF 2008 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-10
Ponencia2008 High-speed character recognition system based on a complex hierarchical AER architecture PROCEEDINGS OF 2008 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-10
Ponencia2008 LVDS interface for AER links with burst mode operation capability PROCEEDINGS OF 2008 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-10
Artículo2008 On real-time AER 2-D convolutions hardware for neuromorphic spike-based cortical processing IEEE TRANSACTIONS ON NEURAL NETWORKS
Ponencia2007 A physical interpretation of the distance tenn in Pelgrom's mismatch model results in very efficient CAD 2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11
Ponencia2007 A physical interpretation of the distance term in pelgrom's mismatch model results in very efficient CAD Proceedings - IEEE International Symposium on Circuits and Systems
Artículo2007 A SPATIAL CONTRAST RETINA WITH ON-CHIP CALIBRATION FOR NEUROMORPHIC SPIKE-BASED AER VISION SYSTEMS IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-FUNDAMENTAL THEORY AND APPLICATIONS
Artículo2007 An accurate automatic quality-factor tuning scheme for second-order LC filters IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Ponencia2007 An AER contrast retina with on-chip calibration 2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11
Ponencia2007 LVDS serial AER link performance 2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11
Artículo2007 On an Efficient CAD Implementation of the Distance Term in Pelgrom's Mismatch Model IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
Ponencia2007 Spike events processing for vision systems 2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11
Artículo2007 The stochastic i-pot: A circuit block for programming bias currents IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING
Ponencia2006 A bio-inspired event-based real-time image processor Proceedings of the First IEEE/RAS-EMBS International Conference on Biomedical Robotics and Biomechatronics, 2006, BioRob 2006
Artículo2006 A low-power current mode fuzzy-ART cell IEEE TRANSACTIONS ON NEURAL NETWORKS
Artículo2006 A neuromorphic cortical-layer microchip for spike-based event processing vision systems IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Ponencia2006 An arbitrary kernel convolution AER- transceiver chip for real-time image filtering 2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS
Ponencia2006 High-speed image processing with AER-based components 2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS
Ponencia2005 A calibration scheme for subthreshold current mode circuits BIOENGINEERED AND BIOINSPIRED SYSTEMS II
Ponencia2005 A digital pixel cell for address event representation image convolution processing BIOENGINEERED AND BIOINSPIRED SYSTEMS II
Ponencia2005 A mismatch characterization and simulation environment for weak-to-strong inversion CMOS transistors VLSI CIRCUITS AND SYSTEMS II, PTS 1 AND 2
Ponencia2005 AER building blocks for multi-layer multi-chip neuromorphic vision systems Advances in Neural Information Processing Systems
Ponencia2005 On event generators for Address Event Representation transmitters BIOENGINEERED AND BIOINSPIRED SYSTEMS II
Ponencia2004 A new charge-packet driven mismatch-calibrated integrate-and-fire neuron for processing positive and negative signals in AER based systems 2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS
Artículo2004 A precise 90 degrees quadrature OTA-C oscillator tunable in the 50-130-MHz range IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Ponencia2004 A precise 90 degrees quadrature OTA-C VCO between 50-130 MHz 2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS
Ponencia2004 A precise CMOS mismatch model for analog design from weak to strong inversion 2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS
Artículo2004 CURRENT MODE TECHNIQUES FOR SUB-PICO-AMPERE CIRCUIT DESIGN ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
Ponencia2004 Hardware implementation of complex reaction-diffusion neural networks using log-domain techniques 2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS
Ponencia2004 On leakage current temperature characterization using sub-pico-ampere circuit techniques 2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS
Ponencia2004 On mismatch properties of MOS and resistors calibrated ladder structures 2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS
Ponencia2003 CMOS transistor mismatch model valid from weak to strong inversion ESSCIRC 2003: PROCEEDINGS OF THE 29TH EUROPEAN SOLID-STATE CIRCUITS CONFERENCE
Artículo2003 Compact low-power calibration mini-DACs for neural arrays with programmable weights IEEE TRANSACTIONS ON NEURAL NETWORKS
Artículo2003 Log-domain implementation of complex dynamics reaction-diffusion neural networks IEEE TRANSACTIONS ON NEURAL NETWORKS
Ponencia2003 MOSFET mismatch in weak/moderate inversion: model needs and implications for analog design. ESSCIRC 2003: PROCEEDINGS OF THE 29TH EUROPEAN SOLID-STATE CIRCUITS CONFERENCE
Artículo2003 On the design and characterization of femtoampere current-mode circuits IEEE JOURNAL OF SOLID-STATE CIRCUITS
Artículo2003 Precise 90 degrees quadrature current-controlled oscillator tunable between 50-130 MHz ELECTRONICS LETTERS
Ponencia2002 A loss control feedback loop for VCO stable amplitude tuning of RF integrated filters 2002 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL I, PROCEEDINGS
Artículo2002 Current-mode fully-programmable piece-wise-linear block for neuro-fuzzy applications ELECTRONICS LETTERS
Ponencia2002 Reliable handling of fempto-ampere currents in standard CMOS European Solid-State Circuits Conference
Ponencia2000 A methodology for MOS transistor mismatch parameter extraction and mismatch simulation ISCAS 2000: IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - PROCEEDINGS, VOL IV
Artículo2000 A new five-parameter MOS transistor mismatch model IEEE ELECTRON DEVICE LETTERS
Ponencia2000 A new strong inversion 5-parameter transistor mismatch model ISCAS 2000: IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - PROCEEDINGS, VOL IV
Artículo2000 A programmable VLSI filter architecture for application in real-time vision processing systems. International Journal of Neural Systems
Ponencia2000 A stored program 2(nd) order/3-layer complex cell CNN-UM PROCEEDINGS OF THE 2000 6TH IEEE INTERNATIONAL WORKSHOP ON CELLULAR NEURAL NETWORKS AND THEIR APPLICATIONS (CNNA 2000)
Ponencia2000 Methodology for MOS transistor mismatch parameter extraction and mismatch simulation Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia2000 New strong inversion 5-parameter transistor mismatch model Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia2000 Programmable kernel analog VLSI convolution chip for real time vision processing IJCNN 2000: PROCEEDINGS OF THE IEEE-INNS-ENNS INTERNATIONAL JOINT CONFERENCE ON NEURAL NETWORKS, VOL IV
Ponencia1999 A 2D image filtering architecture for real-time vision processing systems PROCEEDINGS OF THE SEVENTH INTERNATIONAL CONFERENCE ON MICROELECTRONICS FOR NEURAL, FUZZY AND BIO-INSPIRED SYSTEMS, MICORNEURO'99
Ponencia1999 A 5-parameter mismatch model for short channel MOS transistors European Solid-State Circuits Conference
Ponencia1999 A general subthreshold MOS Translinear theorem ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 2
Artículo1999 A general translinear principle for subthreshold MOS transistors IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-FUNDAMENTAL THEORY AND APPLICATIONS
Artículo1999 Adaptive resonance theory microchips FOUNDATIONS AND TOOLS FOR NEURAL MODELING, PROCEEDINGS, VOL I
Artículo1999 AER image filtering architecture for vision-processing systems IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-FUNDAMENTAL THEORY AND APPLICATIONS
Artículo1999 Bipolar/CMOS current-source flip-flop for application in neuro-fuzzy systems ELECTRONICS LETTERS
Artículo1999 General subthreshold MOS translinear theorem Proceedings - IEEE International Symposium on Circuits and Systems
Artículo1999 On the design of second order dynamics reaction-diffusion CNNs JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY
Ponencia1999 Programmable 2D image filter for AER vision processing ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 4
Artículo1999 Systematic width-and-length dependent CMOS transistor mismatch characterization and simulation ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
Artículo1999 Very wide range tunable CMOS/bipolar current mirrors with voltage clamped input IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-FUNDAMENTAL THEORY AND APPLICATIONS
Artículo1998 7-decade tuning range CMOS OTA-C sinusoidal VCO ELECTRONICS LETTERS
Artículo1998 A high-precision current-mode WTA-MAX circuit with multichip capability IEEE JOURNAL OF SOLID-STATE CIRCUITS
Ponencia1998 Cheap and easy systematic CMOS transistor mismatch characterization ISCAS '98 - PROCEEDINGS OF THE 1998 INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-6
Ponencia1998 MOS/bipolar active input current mirrors with 13-decades gain adjustment range European Solid-State Circuits Conference
Ponencia1998 Voltage clamping current mirrors with 13-decades gain adjustment range suitable for low power MOS bipolar current mode signal processing circuits ISCAS '98 - PROCEEDINGS OF THE 1998 INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-6
Ponencia1998 Voltage clamping current mirrors with 13-decades gain adjustment range suitable for low power MOS/bipolar current mode signal processing circuits Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia1997 A 'do-it-yourself' methodology for CMOS transistor mismatch characterization 40TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1 AND 2
Artículo1997 An ART1 microchip and its use in multi-ART1 systems IEEE TRANSACTIONS ON NEURAL NETWORKS
Ponencia1997 ART1 microchip and its use in multi-ART1 systems Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia1997 Experimental results on the current-mode WTA-MAX circuit with multi-chip capability ISCAS '97 - PROCEEDINGS OF 1997 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I - IV
Artículo1996 A modified ART 1 algorithm more suitable for VLSI implementations NEURAL NETWORKS
Ponencia1996 A real time clustering CMOS neural engine 38TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS, VOLS 1 AND 2
Artículo1996 A real-time clustering microchip neural engine IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
Ponencia1996 Systematic CMOS transistor mismatch characterization ISCAS 96: 1996 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - CIRCUITS AND SYSTEMS CONNECTING THE WORLD, VOL 4
Ponencia1995 Experimental results of an analog current-mode ART1 chip 1995 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-3
Ponencia1994 A CMOS VLSI analog current-mode high-speed ART1 chip 1994 IEEE INTERNATIONAL CONFERENCE ON NEURAL NETWORKS, VOL 1-7
Ponencia1994 CMOS VLSI analog current-mode high-speed ART1 chip IEEE International Conference on Neural Networks - Conference Proceedings
Ponencia1994 Modular current-mode high-precision winner-take-all circuit Proceedings - IEEE International Symposium on Circuits and Systems
Letter1994 THE ACTIVE-INPUT REGULATED-CASCODE CURRENT MIRROR IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Artículo1993 Circuito Winner-Take-All de alta precisión en modo de corriente VIII Congreso Diseño de Circuitos Integrados: Málaga, 9 al 11 de noviembre de 1993
Artículo1967 HAVE YOU EVER NURSED A TURKEY AMERICAN JOURNAL OF NURSING

Proyectos de Investigación

Fecha de inicio Fecha de fin Rol Denominación Agencia financiadora
01/01/2020 31/12/2023 Investigador/a Two-Dimensional Oscillatory Neural Networks for Energy Efficent Neuromorphic computing (NeurONN) (H2020-871501) Comisión Europea (Europeo)
01/02/2020 31/01/2022 Investigador/a Neuro-Radio: Radio cognitiva embebida con aprendizaje neuronal (US-1260118) Junta de Andalucía (Consejería de Economía y Conocimiento) (Autonómico)