Antonio J. Ginés Arteaga

Profesor Contratado Doctor
gines@us.es
Área de conocimiento: Electrónica
Departamento: Electrónica y Electromagnetismo
Grupo: DISEÑO Y TEST DE CIRCUITOS INTEGRADOS DE SEÑAL MIXTA (TIC-178)
Tipo Año Título Fuente
Artículo2021 Digital non-linearity calibration for ADCs with redundancy using a new LUT approach IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Capítulo2020 AMS circuit budgets Silicon Systems For Wireless Lan
Capítulo2020 Analog front-end Silicon Systems For Wireless Lan
Ponencia2020 Calibration of capacitor mismatch and static comparator offset in SAR ADC with digital redundancy Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia2020 Digital calibration of capacitor mismatch and comparison offset in Split-CDAC SAR ADCs with redundancy NEWCAS 2020 - 18th IEEE International New Circuits and Systems Conference, Proceedings
Ponencia2020 Fast simulation of non-linear circuits using semi-analytical solutions based on the matrix exponential Proceedings - IEEE International Symposium on Circuits and Systems
Capítulo2020 Full-custom implementation of analog and mixed-signal circuits Silicon Systems For Wireless Lan
Capítulo2020 Integration Silicon Systems For Wireless Lan
Ponencia2020 Non-linear calibration of pipeline ADCs using a histogram-based estimation of the redundant INL NEWCAS 2020 - 18th IEEE International New Circuits and Systems Conference, Proceedings
Ponencia2020 On-chip reduced-code static linearity test of Vcm-based switching SAR ADCs using an incremental analog-to-digital converter Proceedings of the European Test Symposium
Ponencia2020 Static linearity BIST for V-cm-based switching SAR ADCs using a reduced-code measurement technique NEWCAS 2020 - 18th IEEE International New Circuits and Systems Conference, Proceedings
Ponencia2020 Static linearity BIST for Vcm-based switching SAR ADCs using a reduced-code measurement technique NEWCAS 2020 - 18th IEEE International New Circuits and Systems Conference, Proceedings
Artículo2019 Assessing AMS-RF Test Quality by Defect Simulation IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY
Artículo2019 Fast adaptive comparator offset calibration in pipeline ADC with self-repairing thermometer to binary encoder INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS
Ponencia2019 Mismatch and Offset Calibration in Redundant SAR ADC 2019 34th Conference on Design of Circuits and Integrated Systems, DCIS 2019
Ponencia2019 Redundant SAR ADCs with Split-capacitor DAC 2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018
Ponencia2018 AMS-RF test quality: Assessing defect severity. 2018 IEEE 24th International Symposium on On-Line Testing and Robust System Design, IOLTS 2018
Ponencia2018 Description of SAR ADCs with Digital Redundancy using a Unified Hardware-Based Approach Proceedings - IEEE International Symposium on Circuits and Systems
Artículo2017 Black-Box Calibration for ADCs With Hard Nonlinear Errors Using a Novel INL-Based Additive Code: A Pipeline ADC Case Study IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Artículo2017 Fast Background Calibration of Sampling Timing Skew in SHA-Less Pipeline ADCs IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
Ponencia2017 Likelihood-sampling adaptive fault simulation Proceedings of the 2017 IEEE 22nd International Mixed-Signals Test Workshop, IMSTW 2017
Ponencia2017 On the limits of machine learning-based test: a calibrated mixed-signal system case study Design Automation and Test in Europe Conference and Exhibition
Ponencia2016 A 76nW, 4kS/s 10-bit SAR ADC with offset cancellation for biomedical applications 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016
Ponencia2016 A compact R-2R DAC for BIST applications 2016 IEEE 21st International Mixed-Signal Testing Workshop, IMSTW 2016
Artículo2016 Design methodology for low-jitter differential clock recovery circuits in high performance ADCs ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
Artículo2016 Design of an Energy-Efficient ZigBee Transceiver MIXED-SIGNAL CIRCUITS
Ponencia2016 Design trade-offs for on-chip driving of high-speed high-performance ADCs in static BIST applications 2016 IEEE 21st International Mixed-Signal Testing Workshop, IMSTW 2016
Ponencia2016 Linearity test of high-speed high-performance ADCs using a self-testable on-chip generator 2016 21TH IEEE EUROPEAN TEST SYMPOSIUM (ETS)
Ponencia2016 Low-jitter differential clock driver circuits for high-performance high-resolution ADCs 2015 Conference on Design of Circuits and Integrated Systems, DCIS 2015
Ponencia2015 An approach to the design of low-jitter differential clock recovery circuits for high performance ADCs 2015 IEEE 6TH LATIN AMERICAN SYMPOSIUM ON CIRCUITS & SYSTEMS (LASCAS)
Artículo2015 Background Digital Calibration of Comparator Offsets in Pipeline ADCs IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
Ponencia2014 Closed-loop Simulation Method for Evaluation of Static Offset in Discrete-Time Comparators 2014 21ST IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS)
Ponencia2014 INL Systematic Reduced-Test Technique for Pipeline ADCs 2014 19TH IEEE EUROPEAN TEST SYMPOSIUM (ETS 2014)
Ponencia2014 Power optimization and stage op-amp linearity relaxation in pipeline ADCs with digital comparator offset calibration Proceedings of the 2014 29th Conference on Design of Circuits and Integrated Systems, DCIS 2014
Ponencia2014 Sigma-delta testability for pipeline A/D converters Design Automation and Test in Europe Conference and Exhibition
Ponencia2013 Inductor Characterization in RF LC-VCOs 2013 IEEE 4TH LATIN AMERICAN SYMPOSIUM ON CIRCUITS AND SYSTEMS (LASCAS)
Ponencia2012 Analysis of Steady-State Common-Mode Response in Differential LC-VCOs ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems
Ponencia2012 Self-biased Input Common-mode Generation for Improving Dynamic Range and Yield in Inverter-based Filters 2012 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
Artículo2011 Blind Adaptive Estimation of Integral Nonlinear Errors in ADCs Using Arbitrary Input Stimulus IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT
Ponencia2010 An adaptive BIST for INL estimation of ADCs without histogram evaluation Proceedings of the 2010 IEEE 16th International Mixed-Signals, Sensors and Systems Test Workshop, IMS3TW 2010
Artículo2010 On Chopper Effects in Discrete-Time Sigma Delta Modulators IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Ponencia2010 On-chip Biased Voltage-Controlled Oscillator with Temperature Compensation of the Oscillation Amplitude for Robust I/Q Generation 2010 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS
Ponencia2010 Power optimization of CMOS programmable gain amplifiers with high dynamic range and common-mode feed-forward circuit 2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Proceedings
Ponencia2009 A Survey on Digital Background Calibration of ADCs 2009 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN, VOLS 1 AND 2
Ponencia2009 On-line Estimation of the Integral Non-linear Errors in Analogue-to-Digital Converters without Histogram Evaluation 2009 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN, VOLS 1 AND 2
Ponencia2009 Random chopping in ΣΔ modulators XXIV Conference on Design of Circuits and Integrated Systems (2009)
Ponencia2008 A 1.2V 5.14mW Quadrature Frequency Synthesizer in 90nm CMOS Technology for 2.4GHz ZigBee Applications 2008 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS 2008), VOLS 1-4
Ponencia2008 A 2.5MHz bandpass active complex filter With 2.4MHz bandwidth for wireless communications 23rd Conference on Design of Circuits and Integrated Systems (2008)
Ponencia2008 A 5GHz Wide Tuning Range LC-VCO in Sub-micrometer CMOS Technology 2008 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS 2008), VOLS 1-4
Artículo2008 New swapping technique for background calibration of capacitor mismatch and amplifier finite DC-gain in pipeline ADCs ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
Ponencia2007 Improved background algorithms for pipeline ADC full calibration 2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11
Ponencia2007 Novel Swapping Technique for Background Calibration of Capacitor Mismatching in Pipeline ADCs SBCCI2007: 20TH SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN
Ponencia2006 Statistical analysis of a background correlation-based technique for full calibration of pipeline ADCs 2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS
Ponencia2005 Full calibration digital techniques for pipeline ADCs 2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS
Artículo2005 Noisy signal based background technique for gain error correction in pipeline ADCs IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES
Ponencia2004 Digital background gain error correction in pipeline ADCs DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS
Ponencia2003 Digital background calibration technique for pipeline ADCs with multi-bit stages 16TH SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN, SBCCI 2003, PROCEEDINGS
Ponencia2002 A mixed-signal design reuse methodology based on parametric behavioural models with non-ideal effects DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, 2002 PROCEEDINGS

Tesis dirigidas/tutorizadas:1
Fecha lectura Título Rol
17/01/2014 ANÁLISIS Y DISEÑO DE VCO S PARA APLICACIONES DE RADIO FRECUENCIA EN TECNOLOGÍAS CMOS Director/a

Proyectos de Investigación

Fecha de inicio Fecha de fin Rol Denominación Agencia financiadora
01/03/2006 28/02/2009 Investigador/a Técnicas de diseño y test de circuitos integrados mixtos en tecnologías emergentes (EXC/2005/TIC-927) Junta de Andalucía (Plan Andaluz de Investigación) (Autonómico)
01/01/2016 31/08/2019 Investigador/a Nuevos Paradigmas para el Test de Circuitos Integrados de Señal Mixta (TEC2015-68448-R) Ministerio de Economía y Competitividad (Nacional)
01/01/2012 31/12/2015 Investigador/a Adaptando el Diseño y Test de Circuitos Integrados de Señal Mixta y de Rf a las Variaciones del Proceso y del Entorno (TEC2011-28302) Ministerio de Ciencia e Innovación (Nacional)
03/02/2010 30/06/2014 Investigador/a Auto-Calibración y Auto-Test en Circuitos Analógicos, Mixtos y de Radio Frecuencia (P09-TIC-5386) Junta de Andalucía - Consejería de Innovación, Ciencia y Empresas (Autonómico)

Contratos

Fecha de inicio Fecha de fin Rol Denominación Agencia financiadora
24/11/2016 22/05/2017 Responsable Estudio sobre técnicas de calibración en convertidores Analógico-Digitales (2919/0859) Space Submicron Electronic, S.L. (Desconocido)
20/05/2018 19/12/2019 Responsable Prototipo de convertidor A/D de alta velocidad (150MSPS) y precisión (12 bits) con autocalibración endurecido contra radiación. (3372/0859) Space Submicron Electronic, S.L. (Desconocido)
05/02/2018 31/03/2021 Responsable Adaptable Scalable Mixed-Signal Sensor/Actuator Front-End for Micro-C and FPGAs (3248/0859) THALES ALENIA SPACE ESPAÑA, S.A. (Desconocido)
23/10/2017 21/03/2018 Responsable Optimización de arquitecturas del convertidor Analógico-Digital 2SE-ADC12100-AERO (3158/0859) Space Submicrom Electronic, S.L. (Desconocido)
El investigador no tiene ningún resultado de investigación asociado